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Altera_Forum
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15 years ago

Minimal pulse duration for VIC to recognize an interrupt?

Hi I'm using a cyclone III (EP3C40F48I8N) with a Nios II/f . On a custom component I have a tristate slave interface with an "Interrupt Sender". I found out, that a pulse on the irq of 1...
Altera_Forum's avatar
Altera_Forum
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15 years ago

What is usually done in that case is that the interrupt service routine reads the interrupt status register, stores its value somewhere, clears it and then returns, asking the scheduler to run a DSR when possible. If the operating system you use doesn't supports DSR's, you can have the same behaviour by having the ISR release a semaphore before returning, waking up a task that would handle the communication.

You don't have to wait until you actually read the data to clear the interrupt.