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Altera_Forum's avatar
Altera_Forum
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16 years ago

Memory Access via JTAG (MemTest)

The JTAG IF via USB Blaster offers the possability to gain access to FLASH, Nios and other stuff.

Does anybody know how to gain access via JTAG to any address location, read and write ?

The task is to write a memory test like walking 1's and 0's that runs via JTAG if the FPGA is already running (nios halted)

nios wiki has some tcl scripts but the doc there does not make it clear to me if some of them supports such an access and what must be inluded in sopc.

or does anybody now a link to some pdf explaining how to do this ?

thanks in advance.

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  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Are you saying you can't see the file I attached to the post? I got it directly from the engineer who created it. I don't know if he is going to post it in the solutions database or not. I know the patch works with 9.0 SP2. It may work with 8.1. I have not tried it.

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    no, the file you posted is okay, but the KB has no entry about that.

    If this patch is for 9.0SP2 i doubt i will work for 8.1 and i guess there will never be a patch for 8.1 as the only solution mentioned is to upgrade
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    in what order are your devices on the jtag line ?

    in earlier designs i did, the fpga was after a maxII that lead to some problems and we hat to be aware of the fpga position in the jtag line.

    if your fpga is not the first device on the jtag line, check wheter you can assign its device position number to your script.

    i am unshure if the 0 is the device number, beginning to count from 0

    nowadays all new designs have the fpga as the first device in the jtag flow

    --- Quote End ---

    First thanks for reply (you too sniper). The Stratix-II GX order was 2nd, as you can see in the command:

    1) nios2-configure-sof -c USB-Blaster -d 2 mysof.sof

    <device programmer show success>

    2) nios2-download -c USB-Blaster -d 2 -r -g myelf.elf

    <elf downloaded and verified>

    But inside system console, the FPGA is recognized as device 0:

    4) set mydev [lindex [get_service_paths device] 0]

    /connections/USB-Blaster [USB-0]/EP2SGX90

    I will check the patch and see if it works for me
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    One option that does work is adding an avalon jtag master in addition to nios. It allows system console to read and write memory, external or internal through this master.

    By the way, the patch does not work with Nios 9.0 sp2.

    Regards