Me and my simple questions: Can I do this in FPGA?

It complains because it already has fixed_pkg in the ieee library - and you are trying to redefine it. Modelsim is VHDL 2008 compliant. You dont need to add your files to the project in modelsim. If you really have to add it - do not add it to the ieee library.

The error you are getting implies you have the file already compiled into a library from another location.

As for quartus - if it compiles, it means your design got through synthesis and the fitter. Whether the design is any good is for you to decide.

To see if your code works, you either need to simulate it or run it on a board.

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Tricky thanks for fast response. I edited the downloaded files to not use IEEE_PROPOSED but just leave IEEE. Quartus Prime compiles without error, but Modelsim give several lines of this error

# ** Error: C:........Downloads/altera/fixed_pkg_c.vhdl(1420): (vcom-1295) Function "to_ufixed" has already been defined in this region.# ** =====> Prior declaration of "to_ufixed" is at C:/Users/José/Downloads/altera/fixed_pkg_c.vhdl(1047).

Similar to what happen to this user:

http://www.alteraforum.com/forum/showthread.php?t=49993

What do you recommend to do?

Also, I'd like to ask: If Quartus Prime is compiling good, it means the project is doing good?

How can I see the result of the addition I'm doing?? is it trough modelsim?

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Hi, I fear you are a beginner, if so please don't worry about and it can be simple to solve every problem arise but do a step by step learning of how to do things. We return forever beginner when we learn something new, I am beginner too.

I suggest in the odd case you have no idea of how to use your board to test these exmples:

http://www.pyroelectro.com/edu/fpga/

I found this site useful for learning about, please tell me what you think about.

The board has a very old device on it, you can adapt to another just changing pin assignment, IE you can buy jumper bread board, JTAG ByteBlaster, components and a cheap MAX 2 570 from internet (or better a BeMicro MAX 10 for just 30 US$ where all is on board ready to support your project)

I remember you own a DE1SOC board, this is a very complex @ first time try, is the only one you have at hand? Are you at school right? If not don't care but take your time and before struggle try learn simple clean code.

Your board has button and switch from where you can insert number in binary, has some display where you can read number in hexadecimal, use HEX not decimal so you don't have to convert base for result.

Let me perform online my daily job, so I suggest you a home work, try grasp basic from pyroedu and read a number from 4 switches then decode and display on one digit, then when you post here the code we can start a more complex job like adding numbers, at end of exercise I suppose you get hint on how to display data.

If this is too basic sorry, I got wrong idea of your knowledge but don't try fly too high if you just are learning the basic of fly.

Beginner status is not a problem, I am beginner on QSYS, I am not beginner on VHDL nor FPGA/CPLD, I am beginner on MAX10 and I don't know caveat of this new device due it require time.

VHDL is not so simple and require a huge application, forever "FORGET" programming and remember this is an HDL language all line you wrote are executed in parallel, they are logic gates register and latch not a computer program, the first statement is executed at same time of last one!

Before try learn from strange examples learn from solid code, don't use negative index on arrays, they are confusing about size.

If you agree that we can open a new thread and start do exercises on your board. I own too a DE1-soc, I know it not in deep it is complex and I don't use some part I don't need for design.

When you are ready and decide which way to follow I can help but remember I came here just on free time.

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Tricky thanks for fast response. I edited the downloaded files to not use IEEE_PROPOSED but just leave IEEE. Quartus Prime compiles without error, but Modelsim give several lines of this error

What do you recommend to do?

Also, I'd like to ask: If Quartus Prime is compiling good, it means the project is doing good?

How can I see the result of the addition I'm doing?? is it trough modelsim?

--- Quote End ---

try this simple book

http://freerangefactory.org/books_tuts.html

If quartus compile good is not sign things work, logic can be wrong or timing or other infinite thing more subtle than from a c language perspective. Hardware generated image can fail

Hey tricky, I understand to you that I have several options, the most recommended would be first, try to make the Quartus Prime project to work with the same libraries that Modelsim is using, avoiding to work with the outdated file IEEE_PROPOSED. I did that by removing the downloaded files from proyect, and using the one in the files installed by Quartus Prime.

Quartus prime compiles good. But when I try to launch simulation from Quartus, Modelsim launch the same error than in previous post.

Then I tried loading only the file with the Adder (SUMADOR) and the Testbench. The file Adder compiles good, but for the testbench, Modelsim complinforms this error.

** Error: C:/altera_lite/15.1/elementos/SUMADOR_TEST.vhd(41): (vcom-1360) Array type of "numero1" does not have an index constraint.

** Error: C:/altera_lite/15.1/elementos/SUMADOR_TEST.vhd(42): (vcom-1360) Array type of "numero2" does not have an index constraint.

resultado : out ufixed (3 downto -7); Quartus wont compile for some reason, I have to put (3 downto -8) or higher to make it compile.

Finally, I was wondering if is Ok to ask this sort of questions in this forum. I understand you all are great users of Altera, and my questions looks too basic for you . If it so, please let me know, and I'll go some other forum more basic and I'll come back when I get more knowledge.

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Hi, I fear you are a beginner, if so please don't worry about and it can be simple to solve every problem arise but do a step by step learning of how to do things. We return forever beginner when we learn something new, I am beginner too.

.

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rromano001 thanks for detailed information. I have read that book freerange VHDL indeed is my desk book rightnow. The website you showed looks really nice and organized, I'll keep an eye on it.

Also I understand what you said about experimenting with FPGA by performing some usefull examples and practice, I agreed on this, and this will be my first task after finishing my project. Problem is that I have this project to do for my course, and I have seen it doesn't require the experience that you mentioned, I have checked introductories books like rapid prototyping of digital systems, design recipes of digital systems, the Altera video lectures, and they all are good books, but they are always ahead to design a some frecuency divider or a Microprocessor from scratch, but when is about arithmetic of integers, fractional, floating and fixed points, I can't find much and the most important "updated" information.

You are right, I am a beginner in this, but not that much in programming low level language, by managing registers and memory stack I could implement a divition, square roots whatever using only Assembly Language, but that is not convenient to do. That's where I've found there is a fixed point library where one can easily define fixed point numbers and program arithmetic very easily, which is I really want to do, for this i'm considering any solution, even considering if Verilog would be better, or if Altera has its own library for this, etc.

My only board available is DE1, but I think simulator would be more than enough for what I need, since i won't make use of the softcore and the other IP included in the development board.

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rromano001 thanks for detailed information. I have read that book freerange VHDL indeed is my desk book rightnow. The website you showed looks really nice and organized, I'll keep an eye on it.

My only board available is DE1, but I think simulator would be more than enough for what I need, since i won't make use of the softcore and the other IP included in the development board.

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IN first good job, and thank for a correct measure of your level, ok for assembly programming but as I said before and about what you find on avery course remember something is in common to both VHDL (logic gates and register design) and programming language too.

Don't assume VHDL as a programming language, it is also a programming language on its definition but you are using HDL part and are two really different thing of same language. When you use as programming ok you are using a computer, when HDL you are generating an image to some silicon. NEVER FORGET THIS!!!

How much time you have to do job and just curious where is your location?

Ok now you need some hint on how to manage fractional integer, start on our decimal system 129.35 is a fractional number, if you multiply by 1000 or large power of base your number get integer and fractional part is at left of weight of multiplier, so 129 where integer part and 35 fractional get transformed in 129350 where 350 is the fractional part. If this was previously clean don't worry and tell us.

All numeric base as I suppose you learnt all number are can be represented as a series of base raised to weight multiplied by digit value, so 129.85 base 10 can be expressed as 10^2 * 1 + 10^1 * 2 + 10^0 * 9 + 10^-1 * 3 + 10^-2 * 5 if you multiply a number by the base you shift all number to left and enter a zero from right,

if you divide number by base you shift number to right passing last digit to fractional or just dropping if integer numbers .

On previous century a man invented the complement to base to do subtraction from addition, this was in the mechanical calculator era, this man idea of number property prepared our base 2 notation: one digit is devoted to sign and negative number where represented in this convenient manner due don't need know if they are positive or negative and just one operation was necessary, if you choose leftmost as sign operation can be performed on integer number regardless of sign.

This way division and multiplication of complement number require an extra care to preserve sign information.

What change of what we know if we change base? Just nothing that series it represent and values, if you need to represent decimal number in binary form you just need enough figure to fit number, just base value change from 10^weight to 2^weight so you just need more digit (BIT -> binary digit) right?

Now if you decide have simple number we can do an example with 8 bit value, on integer unsigned you get value from 0 to 255 in signed from -128 to +127 and what if you reserve some bit to fractional?

Just right part nibble is fractional largest number can represent are:

Unsigned : +15 and 15/16

signed; -8 to +7and 15/16 to -8,

smallest number can be +- 1/16 -> 0.0625

0111 1101 for example has:

integer part 111 -> 7,

fractional is 1 * 2^-1 + 1 * 2^-2 + 0 * 2^-3 + 1 * 2^-4 => .5 + .25 + .0625 or in fractional 1/2 + 1/4 + 0/8 + 1/16 or 13/16 resolution of numbers are .0625

In general resolution of fractional is base ^ - n whre n is te number of fractional digit.

In case need finest resolution you just need add more bit to fractional to increase denominator of fraction and more bit to integer part to manage the largest number.

Ok now how these number are to be treated? Simple they are just integer so ordinary addition subtraction can do the job. When you need output value you have to scale it.

If you need help and started grasping something in VHDL IMHO stay away from Verilog, it is dangerous, it seems C but IT ISN'T at all.

Try with a simple thing, get inspiration from Pyroedu LED and write your first exercise,

- try drive board led in front of switches with a code, it can be very trivial but this familiarize you with assignment operator <=, then you can read switch as bus of 4 bit

- drive some segment of Display from switches

- learn how to write a module (equivalent to function and procedures of programming languages)

- Write a module to display input values to hexadecimal figures on display

- assemble this module in a project to display binary number from switches in both binary on LED and HEX on display, extend display module to more than one digit.

I think this point you have more confidence with tool and a test bench for input from switches and display to hexadecimal number.

If you prepare a simple combinational adder module then you can insert between switch input and display module and have two number from switches added together.

If you do these simple step I am quite sure you understand more on your job.

Till here you have used just combinatorial level, so grasp in full and experiment on board, possibly use SOF file, it is faster and don't wear programming flash, just it disappear on power cycle and board return to previous state.

I am not your professor but I am still troubled with mine pupils try do thing from unknown, take your foot on stand and follow the right way.

When you post result of driving display we can do some other on sequential about loading register from external.

About your sentence on last line, on board there where none IP nor Softcore embedded, you need load your instead of the programmed one. I suppose you intended the HARD core ARM instead of soft core.

Edited some part on Jan 7 where text was difficult to read.

Hi, long silence, is some progress on?

Regards