Maximum Frequency Input on Cyclone 3 device

By Cyclone III specification, input toggle rates above 250 MHz are only supported for the LVDS standard. If you want to keep the specification strictly, an external LVDS driver could convert a single ended signal to LVDS. That's obviously more economic than using Arria or similar only to support 320 MHz single ended clock.

In any case, you'll have difficulties to find a driver supporting 320 MHz with a single ended standard. Single ended driven "LVDS", e.g. a low voltage signal from a clock oscillator should most likely work with Cyclone III.

If clock quality is critical, you'll get less jitter with an external LVDS repeater or differential output high speed comparator, that's not affected by the interfering signals present in a FPGA.