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Altera_Forum
Honored Contributor
16 years agoMAX7000 initialization problem
I am using Quartus II with a MAX7000s EPM7128. I am having a problem with an 8 bit latch not being initialized properly on power up of the CPLD. The latch outputs should be all zero after the cpl...
Altera_Forum
Honored Contributor
16 years agoWell I did some more testing and it appears my celebration was premature. The latches now power up initialized to zero most of the time (probably 4 out of 5).
I also set the power-up level in the assignment editor and it's not any better.