Honored Contributor
Honored ContributorYour report doesn't sound reasonable. MAX3488 has a standard LVTTL interface specification and can be expected to work with any logic device with VCC of 3.3V. I assume, that standard signal wiring rules for digital logic are kept. This includes the usage of series termination resistors for longer PCB traces, sufficient ground connection and bypassing.
On the RS422 receiver side, you won't get a stable idle level on the receiver without biasing resistors. That's a RS422/RS485 standard problem and not particularly related to FPGA.
