MAX10DD devices seem to not support ADC Blocks ?!?

Hi,
you can make a very simple test, instantiate the add IP as top level entity. As expectable, failing of adc IP synthesis results in design generation failure.

Error (12252): Adc_bad.modular_adc_0: The selected device part number 10M50DDF256C8G does not support ADC
=>

Error (12153): Can't elaborate top-level user hierarchy

(checked with Quartus Prime Std. 22.1)

you can just take what i sent previously, and change the target device to the DA variant rather than DD. after doing so, and opening Platform Designer, you don't see the error in the window:

you can generate HDL successfully (ignore the warning since this is a dummy design and not fully hooked up to anything useful):

as for the parameters of the ADC core, it seems to be rather inconsequential. I've tried it with single channels, all channels, etc. and it didn't matter. the dummy design i previously sent has two of them enabled, as well as the sequencer. you can open the block to check it out for yourself.

i'm uploading the SAME DESIGN, with only the target device changed to DA vs. DD. You should be able to show someone else at your company what is going on, and maybe they can help you resolve this.

Hi,

Thank you for your information. The internal team have worked on this.

It is confirmed that Max10 "DD" variant should not getting the error.

The fix should be implemented in the future release of Quartus. Do you need patch to enable this in your current Quartus Prime version (22.1std) ?

Regards,

Aqid

i think a patch for any version would help. i'm using the 22.1std, but is the "LITE" version, not sure if it makes any difference for the patching.

thanks for the response!

Hi,

Unfortunately, I can only request the patch for Standard version regarding this issue.

Regards,

Aqid

Hi,

Sorry for the misunderstood. I have requested the patch for the version that you used (22.1std) and need your help to provide confirmation if it is really work on your side as the error seems to be fixed in the internal version.

I will contact you by private email to provide you with the file.

Regards,

Aqid

ok, i''ll try it out when it's provided.

thanks

hello-

I successfully installed the patch provided, into my 'lite' version of 22.1:

i have been able to change my design back to the "DD" variant in Quartus, and then in Platform Designer it does not complain about the ADC blocks. I was able to generate the IP from the Platform Designer, and then successfully place-and-route back in Quartus.

if you could provide a target release for the fix into the main Quartus release, it would be great. This allows us to progress currently.

Thank you.

Hi,

I am grateful that the patch file provided helps you to proceed for now. From the current information I have, the target version to implement this fix is on Quartus 24.1 Standard version.

With that, may I know do you need any more support on this?

Regards,

Aqid

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