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cjamcki's avatar
cjamcki
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2 years ago

MAX10DD devices seem to not support ADC Blocks ?!?

we have a design targeting 10M50DDF256I7G. The device overview claims to support analog features as well as RSU, and some special flash access (not sure what that is but whatever). However, in Qsys...
Fpga Devkit
cjamcki's avatar
cjamcki
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1 year ago

hello-

I successfully installed the patch provided, into my 'lite' version of 22.1:

i have been able to change my design back to the "DD" variant in Quartus, and then in Platform Designer it does not complain about the ADC blocks. I was able to generate the IP from the Platform Designer, and then successfully place-and-route back in Quartus.

if you could provide a target release for the fix into the main Quartus release, it would be great. This allows us to progress currently.

Thank you.