Forum Discussion
Altera_Forum
Honored Contributor
7 years agoHi AMKozha,
--- Quote Start --- I think that if use jtag pin sharing and pulling-up jtagen, you can program fpga via jtag --- Quote End --- Yes, You have said the configuration for Dedicated JTAG pins. --- Quote Start --- after programming pull-down jtagen and use Jtag pins as diff io (after making them diff in pin planner) --- Quote End --- Not possible. If you intend to switch back and forth between user I/O pins and JTAG pin functions using the JTAGEN pin, all jtag pins must be assigned as single-ended i/o pins or voltage-referenced I/O pins. Schmitt trigger input is the recommended input buffer. Let me know if this has helped resolve the issue you are facing or if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)