Altera_ForumHonored Contributor10 years agoMAX10 FPGA versus Cyclone V Hi, I wrote some VHDL code for the Cyclone V FPGA with ALTLVDS_RX function. Can I use the same code for the MAX10 FPGA? Regards.
Recent DiscussionsPart Status requestAgilex 7 DDR4 Reset and ADDR/CMD Clock PCB Implementation Documentation DiscrepancyVcm for the clock input pins of agilex5 E-series FPGA A5ED065BB32AE5SR0Arria 10: Remote Update Factory Fallback won't work & Watchdog does not triggerIBIS models GTS banks agilex 5E