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Valerius's avatar
Valerius
Icon for New Contributor rankNew Contributor
1 year ago

MAX10 FPGA design : some questions about clock and other aspects

Hi all, finally I'm doing my first FPGA design (after tons with simpler CPLDs) I'm targeting a MAX10 FPGA (10M08SCE144C8G is the exact part name).The design will be a kind of replacement installed ...
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RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

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