Honored Contributor
Honored ContributorYes, even though I am not using device's ADC, I just added a ferrite bead between REFGND and GND, as suggested in a Board Guideline, another of the several ref docs.. sigh.. :-( Perhaps it' an overkill.
1) It's a BGA package. So I was trying to keep the De-coupling caps as close as possible. So using the under side of the device. For future, it's fine if they are on the same side? (and relatively far from the power pins..) 2) So OK to use the Dev kit schematic as a reference, for my de-coupling cap strategy, despite the differences of device packages and PCBs? I was also also wondering if it was possible to just use 2-4 caps per power bank, rather than 1 cap per power pin. Although now I am already using 1 de-coupling per power pin and would just ahead with it. I thought this was also perhaps an overkill? 3) And am I OK with the Linear regulators, though the 5V input would be via a wall mount switching regulator, as mentioned above? Interetingly the Early power Estimation sheet is showing ~ 290mW power consumption, with nearly 200mW in static power only... So the dynamic is only 90mW...? Is the normal.. My clock is only 27MHz and I am using toggle rate of 35%. Device usage is about 50 % LUTs (4050) and 25% FF (2200). 4) Also ok to route VCCA and 3.3V on the same plane? Thanks a lot.
