Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

MAX10 10M02SCE144C8G high current draw

Hello,

I recently soldered a MAX10 single 3.3v supply part (10M02SCE144C8G) onto a breakout board to run some experiments with. I connected all the IO supplies to 3.3v successfully loaded a "blinky" sof and pof using the internal oscillator via JTAG - and it works as expected.

The problem I have is that the FPGA draws 200-220mA all the time even if erased (by the Quartus17 programmer via JTAG). The Max10 EPE and the Quartus power tool both suggest I should see _much_ lower current consumption when in user mode and pretty much idle. There is no appreciable VCCIOx current draw.

The heat is being dissipated in the FPGA and I don't have a short on my PCB.

I haven't found any logic function in the part which is broken. I set up a 2000 bit shift register to use 90% of the LEs and that worked as expected clocked from the internal oscillator (~116MHz IIRC)

I have been through the PCG (pin connection guide) old altera branded and new intel branded and think I have connected the minimum I need. I have tried configuring all unused pins as inputs with pull ups and outputs driving ground & get the same current draw.

The minimal connections I made are:

all powers = 3v3 (+ decoupling caps)

all grounds

TCK, TDO, TMS, TDI to a jtag connector with pullups/downs as per UG-M10CONFIG 3-3

nSTATUS,CONF_DONE,nCONFIG 10k pull up to VCCIO8

LED on pin14

I can think of 2 possibilities:

1) There is some pin(s) I need must connect so some IO is oscillating or somesuch.

2) I damaged the part during soldering.

Does anyone have experience of similar issues?

Can heat damage to the internal regulator cause these symptoms?

Thanks,

Chris

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hi,

    just to mention (as you said, you've soldered the device to a breakout board)... Did you also connect the exposed Pad "below" the package to GND like stated in the PinOut file?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hello,

    Yes it is an EP adapter board and I confirmed I had a good connection by testing continuity between the ground plane (EP) and other FPGA ground pins before I connected those other ground pins.

    I measure ~16 ohms accross VCC_ONE to GND which would give me my 200mA+ current draw @3.3v by ohms law. This makes me think I damaged the part rather than it being misconfigured and/or inputs oscillating - but intosc, logic & FLASH work as expected & I have found no damaged function...

    Chris
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    8 years ago

    Hello,

    Not sure what happened to my first reply. I will try again.

    Yes the EP was soldered and connected to ground. I measured ~15ohms between VCC_ONE and GND which seems wrong so I took the part off. With it off I also measure 15 ohms so I think I must have damaged the on chip (single 3.3v supply FPGA) regulator when I fitted it the first time. So it does seem the part was damaged and not a pin connection thing. I assume it was heat damage.

    Chris