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abedin's avatar
abedin
Icon for New Contributor rankNew Contributor
30 days ago
Solved

MAX V DEV Board

I wrote a simple VHDL program that gets input from J6.1(p2) pin and output the same voltage at pin J6.2 (M4). I could successfully program the device but as I set the input to 3.3V, I get 0V at the o...
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  • FakhrulA_altera's avatar
    FakhrulA_altera
    19 days ago

    Hi Abedin,

    I wanted to follow up on this case to check if you have any further questions or concerns. Please feel free to reach out if there's anything you'd like us to assist you with.

    Regards,
    Fakhrul

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
29 days ago

Can you show your code?

abedin's avatar
abedin
Icon for New Contributor rankNew Contributor
29 days ago

library ieee;
use ieee.std_logic_1164.all;

entity voltinout is
    port(
        inpinvolt  : in  std_logic;
        outpinvolt : out std_logic
    );
end entity voltinout;

architecture Behavior of voltinout is
begin
        outpinvolt <= inpinvolt;
end architecture behavior;

 

I used pin assignment to specify inpinvolt to J6.1(P2) and outpinvolt to J6.2(M4). My code compiled and in the RTL viewer it shows a direct connection from input to output. 

I used a 3.3V supply and connect it with the input in J6.1 to GND but the output at J6.2 shows zero with a multimeter.