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srimathi's avatar
srimathi
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1 year ago

Max II EPM240T100C5N CLCD

I'm using an Altera MAX II EPM240T100C5N CPLD and trying to implement UART transmission using Verilog (bit-banged at 9600 baud). The design is written and successfully compiled in Quartus, and progra...
Board Debug
Programmable Logic Device
Farabi_Altera's avatar
Farabi_Altera
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1 year ago

Hello,


You will in UART IP to implement the design. Do you have the IP?


regards

Farabi


srimathi's avatar
srimathi
Icon for New Contributor rankNew Contributor
1 year ago

Hi,
I don't have anything like that(UART IP) and also no idea about it. Can you please share your thoughts on how to do the UART communication.

Thanks.