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Altera_Forum
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13 years ago

MAX II Device Erase and reprogram cycles

Hello,

i want to use the UFM Block in a MAX II Device to store some serial numbers.

In the MAX II Device Handbook, Table 5–3. MAX II Device Programming/Erasure Specifications

there is given a maximum value ( 100 cycles ) for erase and reprogram the UFM ( and the CFM blocks, too ).

But no value for minimum erase and reprogram cycles !

Looking someone, whether this is a fault in the table 5-3.

It is important for me to know the minimum erase and reprogram cycle count.

Thanks for help.

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I would take the MAX II specification to mean that you can erase and reprogram the UFM/CFM a maximum of 100 times. After that the memory may become unreliable. The minimum number of times would be zero.

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Curiously some manufacturers are placing a "maximum write cycles" title over flash memory endurance numbers while others write "minimum write cycles". Obviously both mean just the same thing.

    The more interesting point would be to know about the actual statistics, which percentage of MAX II has been observed to fail after 100, 200 etc. erase/program cycles.

    Primarly, the numbers tell you how the device can be reasonably used and what should be avoided. It's e.g. no problem to store calibration data in a MAX II user flash, that may be updated once a year. But you shouldn't plan to rewrite it daily or weekly.

    I guess, I have some instrument prototypes with MAX II that have survived more cycles. I don't particularly care about. But production devices should be safe.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    The other thing to remember is that the data retention time is specified as something like 10 years.

    After exceeding the number of write cycles the retention time will be less.

    A datasheet I read years ago did point out that the locations that are frequently written are unlikely to be the ones on which you need long retention times.

    So engineering boards - where you don't care about long retention times - are likely to 'work' after a lot more write cycles. Just don't send them out to customers later.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Hi folks,

    I wonder why is the rewrite cycle so low? I mean there are flash storage devices nowadays with 100,000+ cycles, why not use such technologies on-chip?

    Thanks for the reply
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    To some extent it could just be component testing.

    100 write cycles is typically plenty, so there is no point discarding parts that would be expected to fail at (say) 1000 cycles.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    It's a matter of chip technology. Flash uses high voltage transistors and embedded charge pumps, not compatible with high density FPGAs. You also find relative low guaranteed flash endurance (e.g. 1000 cycles) with some recent microcontrollers. To get similar endurance numbers as dedicated flash memory devices, you have to assemble multiple chips in a package, increasing costs.

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Thanks for the reply. (OFF: Small world, my gf is from Bochum, Germany :) )