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Altera_Forum
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7 years ago

MAX-10 FPGA, Voltage level on PLL_CLKOUT pins

Hi all, I want to use one of the PLL_CLKOUT pins on the 10M50DAF256 FPGA to output a clock signal to an external ADC component that requires 1.8V voltage level. If for example I will use the ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Hi,

Voltage level will be same as bank voltage where pin is located.