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Altera_Forum's avatar
Altera_Forum
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14 years ago

LVDS signal as the input of ccd sensor?

Can I use a low-voltage differential signaling (LVDS) signal as the input of kai-1020 image sensor driving signals?

thanks

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Which signals are you referring to? As far as I see, the chip requires mostl 5V CMOS drivers, partly high strength and level shifting.

  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    If the sensor outputs are LVDS then yes, you can.

    --- Quote End ---

    what i say is that the sensor be drived by FPGA.

    ccd drive signal level

    1.Pulse Amplitudes -ccd drive signal ?

    Clock Min. Amplitude (volts) Coupling Min. Coupling Capacitor Value (μF) Max. Coupling Capacitor Value (μF)

    SH 3.5 DC -- --

    H1 4.7 AC 0.1 0.47

    H2 4.7 AC 0.1 0.47

    SA 4.7 AC 0.01 0.47

    SB 4.7 AC 0.01 0.47

    R 4.7 AC 0.01 0.47

    T 4.7 AC 0.01 0.47

    V1 4.0 AC 0.01 0.47

    V2A 4.0 AC 0.01 0.47

    V2B 4.0 AC 0.01 0.47

    FD 4.0 AC 0.1 0.47
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    Which signals are you referring to? As far as I see, the chip requires mostl 5V CMOS drivers, partly high strength and level shifting.

    --- Quote End ---

    Thanks for reply .

    ccd drive signal level

    1.Pulse Amplitudes -ccd drive signal ?

    Clock Min. Amplitude (volts) Coupling Min. Coupling Capacitor Value (μF) Max. Coupling Capacitor Value (μF)

    ?SH 3.5 DC -- --

    ?H1 4.7 AC 0.1 0.47

    ?H2 4.7 AC 0.1 0.47

    ?SA 4.7 AC 0.01 0.47

    ?SB 4.7 AC 0.01 0.47

    ?R 4.7 AC 0.01 0.47

    ?T 4.7 AC 0.01 0.47

    ?V1 4.0 AC 0.01 0.47

    ?V2A 4.0 AC 0.01 0.47

    ?V2B 4.0 AC 0.01 0.47

    ?FD 4.0 AC 0.1 0.47

    2. 74ac04-buffer
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Which signals are you referring to? As far as I see, the chip requires mostl 5V CMOS drivers, partly high strength and level shifting.

    --- Quote End ---

    Thanks for reply.

    In my design ,the sn74alvc164245 be used between the fpga and ccd sensor.
  • Altera_Forum's avatar
    Altera_Forum
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    74ALVC is a 3.3V logic family. It's good to inter5face the FPGA, but won't be able to drive the CCD sensor which requires 5V level. 74HCT or AHCT would be basically suited for the 3.3V to 5V level conversion.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    74ALVC is a 3.3V logic family. It's good to inter5face the FPGA, but won't be able to drive the CCD sensor which requires 5V level. 74HCT or AHCT would be basically suited for the 3.3V to 5V level conversion.

    --- Quote End ---

    thanks for reply.

    TI sn74alvc164245 is be tooked in my design .

    Li Sheng