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Honored Contributor
Honored ContributorLVDS interconnect
Hi all I designed a board, There are two FPGAs, One is ep1agx50 , anothers is ep2s130. About 6 months ago, I can transmit data form ep2s130 to ep1agx50 through LVDS, But now, The ep1agx50 can't...
Altera_ForumHonored Contributor
Honored ContributorThe Stratix II device handbook clarifies, that PLL_ENA must be connected to GND, if not used in your design.
