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Altera_Forum
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15 years ago

LVDS interconnect

Hi all I designed a board, There are two FPGAs, One is ep1agx50 , anothers is ep2s130. About 6 months ago, I can transmit data form ep2s130 to ep1agx50 through LVDS, But now, The ep1agx50 can't...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

PS: Clock frequency : 100Mhz, deser factor : 1, bus width : 8