Forum Discussion
Altera_Forum
Honored Contributor
10 years agoLVDS critical warning
hello I got many warnings which are ... "ID:12887 Too many 2.5-V SE IO in bank <name> with LVDS RX pin <name>. Reduce the number of 2.5-V I/Os used and re-run the analysis again. ...." a...
Altera_Forum
Honored Contributor
10 years agoSE = single-ended. There must be rules for your target device about how many single-ended IOs you can have in your LVDS banks (usually only SE outputs matter). There are sometimes proximity rules as well that are errors instead of warnings and the tools won't let you compile the design. In those cases there are usually .qsf constraints that can bypass the errors, but then it's on you to live with the consequences.
If your single-ended outputs don't transition much then you may be fine, but if they are extremely active outputs you might want to be more conservative and try to abide by the rules.