Altera_Forum
Honored Contributor
16 years agoLVDS and Clock Delay on Cyclone II
I'm trying to implement the ALTDQS for adding a clock delay on my DDR clock input. This works fine with a single ended input (DQS) but not with LVDS. It gives me following error:
"DQS does not support true differential I/O standards" Is there a way to add a clock delay AND use LVDS? Or am I just doing something wrong? thanks Marcel