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Altera_Forum
Honored Contributor
17 years agoLVDS (2.5V) in Banks where JTAG and Config Pins reside?
Hello, I want to use the Bank 2, 5 and 6 of the Cyclone II EP2C35F484 for LVDS communication. An FAE from Sasco Holz (Arrow) told me, that i should use the left and right banks for LVDS instea...
Altera_Forum
Honored Contributor
16 years agoTake bank 6 for example.Some configuration pins(MSEL,CONF_DONE) should be pull up tu VCCA.VCCA here stands for VCCIO in the bank these pins reside in.So,if we use IO from bank 6 as LVDS,we just wire VCCIO_bank6 ,MSEL and CONF_DONE to 2.5v.Level translating isn't needed for bank 6.Am i right?