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Altera_Forum
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17 years ago

LVDS (2.5V) in Banks where JTAG and Config Pins reside?

Hello, I want to use the Bank 2, 5 and 6 of the Cyclone II EP2C35F484 for LVDS communication. An FAE from Sasco Holz (Arrow) told me, that i should use the left and right banks for LVDS instea...
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Altera_Forum
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17 years ago

You can use VCCIO of 2.5V for JTAG and configuaration. All pull-up resistors and JTAG connector VCC should be wired to the respective VCCIO voltages. There may be a problem with Altera AS devices, that are not available with other supply voltages than 3.3V up to now. Output pins to AS memory should reside in a 3.3V powered bank by specification, otherwise the high level margin would be too low.