Forum Discussion
AdzimZM_Altera
Regular Contributor
1 year agoHi,
Based on your report, the issue is related to DDR3 calibration failure.
Please check the point below to debug this issue: -
- Check the button/switch or any trigger port on board that controlling the reset pin for DDR3 EMIF IP. Make sure it's not hold in reset.
- Have a standalone DDR3 example design to debug the calibration issue.
- You can generate from the DDR3 IP that match your board and memory setting.
- Make sure the pin placement of the DDR3 design is matching to the board.
Can you try to upgrade the design to any latest Quartus version?
OR can you just solely test DDR3 on the board on latest Quartus version?
Do you know if there is any Configuration via Protocol (CvP) has been used to program the board?
Regards,
Adzim