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Altera_Forum
Honored Contributor
16 years agolittle question about VHDL
Hi,all, I want to ask is it costs a lot of resource or time delay to determine when using the sentence "if (vir+M)>500 then" ,here vir and M are both integer type. Thanks in advance.
Altera_Forum
Honored Contributor
16 years agoDSP blocks (they are designated "embedded multipliers" with Cyclone family) only if needed. You can check in the physical netlist of your design.