lightweight bridge address for DE1-SoC board

Question

Hi there!

I try to do some exercises with Terasic's DE1-Soc Cyclone V board. As a first exercise I'm trying to send data from the HPS to the FPGA over the lw bridge, using the FPGA as an Avalon slave. Im a bit confused now about the correct address to use. I saw for the Arrow Sockit board, it is 0xff200000. I could not find it anywhere, I think in the user manual it is referred as: ALT_LWFPGASLVS_OFST. But I'm not even sure about that.

Please, can someone help me and perhaps tell me where I actually can find the address? and which is the correct address for the lightweight bridge on the DE1-SoC board?

Thanks in advance!

Edit: I saw I had an additional 0 erronously in the address, my setup works now, with 0xff200000. Still, I would like to know where this address is referred to, is it to be found in the FPGA specs or the Cyclone V specs?

altera_forum · Answer

It's part of the HPS specs.  I typically refer to this when I'm trying to figure out the memory map:  http://www.altera.com/literature/hb/cyclone-v/hps.html  (that bridge is "lwfpgaslaves").  When you connect the lightweight H2F bridge to soft logic in the FPGA, the physical address of the soft IP is 0xFF20_0000 + base address of soft IP.

altera_forum · Answer

Thanks a lot, the link was what I was looking for!! Perfect!

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lightweight bridge address for DE1-SoC board

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