Altera_Forum
Honored Contributor
16 years agoLIFO make with array and Cyclone
Hello everyone! first sorry for my english.. I must create a driver memory LIFO (stack). Implementation of memory using VHDL plate (array) and through a block of memory from resource type Altera Cyclone. I create a array on VHDL but I don't have any idea how link/combine this with Cyclone memory.
My program looks like that http://img407.imageshack.us/img407/875/29562232.jpg-- Generated by Quartus II Version 9.0 (Build Build 184 04/29/2009)
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
-- Entity Declaration
ENTITY LIFO IS
-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
PORT
(
czytajData : IN STD_LOGIC;
piszData : IN STD_LOGIC;
rst : IN STD_LOGIC;
clk : IN STD_LOGIC;
dataIn : IN STD_LOGIC_VECTOR(7 downto 0);
dataEmpty : OUT STD_LOGIC;
dataFull : OUT STD_LOGIC;
dataOut : OUT STD_LOGIC_VECTOR(7 downto 0)
);
-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
type mem is array(0 to 63) of std_logic_vector(7 downto 0);
END FILO;
-- Architecture Body
ARCHITECTURE LIFO_architecture OF LIFO IS
signal ledWrite : integer;
signal ledRead : integer;
signal dataWew : mem;
BEGIN
--process odpowiedizalny za wpisywanie
process (rst, clk, piszData) is
begin
if (rst = '1') then
ledWrite <= 0;
dataFull <= '0';
elsif (rising_edge(piszData)) then
dataWew(ledWrite) <= dataIn(7 downto 0);
if ledWrite < 63 then
ledWrite <= ledWrite + 1;
else
ledWrite <= 0;
end if;
if ledWrite = ledRead then
dataFull <= '1';
else
dataFull <= '0';
end if;
--dataFull <= (ledWrite = ledRead);
end if;
end process;
--process odpowiedzialny za czytanie
process(rst, clk, czytajData) is
begin
if(rst = '1') then
ledRead <= 0;
dataEmpty <= '0';
elsif (rising_edge(czytajData)) then
dataOut(7 downto 0) <= dataWew(ledRead);
if ledRead < 63 then
ledRead <= ledWrite - 1 ;
else
ledRead <= 0;
end if;
if ledRead = ledWrite then
dataEmpty <= '1';
else
dataEmpty <= '0';
end if;
--dataEmpty <= (ledRead = ledWrite);
end if;
end process;
END LIFO_architecture;
THX! for any help.