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Honored Contributor
Honored ContributorLIFO make with array and Cyclone
Hello everyone! first sorry for my english.. I must create a driver memory LIFO (stack). Implementation of memory using VHDL plate (array) and through a block of memory from resource type Altera Cycl...
Altera_ForumHonored Contributor
Honored ContributorHave a look at the recommended hdl coding styles (http://www.altera.com/literature/hb/qts/qts_qii51007.pdf?gsa_pos=15&wt.oss_r=1&wt.oss=guidelines%20hdl), especially the "Inferring Memory Functions from HDL Code" chapter. It gives you some example of VHDL code that will infer FPGA memory.
