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paramProd's avatar
paramProd
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1 day ago

Agilex 5 RCOMP_GTS connection change and its effect on HVIO input pins [TEST]

In the Pin Connection Guidelines below, the connection method for the RCOMP_GTS pins has been changed.
https://docs.altera.com/r/docs/813266/current/pin-connection-guidelines/example-1-agilextm-5-devices-with-speed-and-power-grade-1v-2v-2e-and-3v

Related KDB: Why do HVIO pins in an Agilex® 5 or Agilex® 3 FPGA HVIO bank appear to be non-functional after device configuration? | Altera Community - 353565

We have two questions.

  1. Is this change due to a change in the device itself (silicon or specification)? Or was only the document updated, with no change to the device?
  2. Why do the HVIO input pins stop working when RCOMP_GTS is floating? We thought the HVIO bank and the GTS transceiver bank were not related.
Configuration

1 Reply

  • ai_responder's avatar
    ai_responder
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    1 day ago

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