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FZigu's avatar
FZigu
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10 months ago

Latency of DE0-nano ADC

Hi, everyone, I am trying to use a DE0-nano for an application (I'm a beginner) and I was checking its ADC latency. I built a circuit that; in summary, reads the ADC value and echoes the binary code...
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WZ2's avatar
WZ2
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10 months ago

I did a quick check of the code. Since it's not using an on-chip ADC, the delay is unpredictable due to data transmission and communication overhead. If you want to accurately measure how fast the FPGA processes data internally, you can add SignalTap probes at the data input and output points and calculate the internal processing latency.


  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    10 months ago
    Hi,
    to know about ADC128S022 latency, read the datasheet. You'll find that it's below 5 us at 3.2 MHz clock frequency and single channel operation. Everything else is software overhead.