Forum Discussion
Minh_Le
New Contributor
New ContributorJTAG to Avalon master simulation
Hi,
I want to simulate my entire design that include main_qsys IP core and Nios processor. I try to follow the link below to talk to Avalon bus via System Console in simulation; however, I couldn't...
KellyJialin_Goh
Frequent Contributor
Frequent ContributorHi Minh Le,
The setup_pli.tcl script is now fixed and can be downloaded from the link here: https://community.intel.com/t5/FPGA-Wiki/Avalon-ST-JTAG-Interface-PLI-Simulation-Mode/ta-p/735219
Hope this could solve your problem and kindly update if it works on your side too. Thank you.
Regards,
Kelly Jialin, GOH
