JTAG target board circuit design

i've been using the Schematic Review Worksheets as a golden reference for this kind of information. there isn't one for the MAX parts, but i've used Stratix IV and Cyclone IV worksheets

http://www.altera.com/download/board-layout-test/schematic-review-ws/srw-index.jsp

-TCK pull down 1k, i'm sure 5% is fine

-TMS and TDI 10k pull up

-TDO has neither pull up or pull down (because the device drives it)

-yes, you should connect all power pins, don't forget about the e-pad underneath newer QFP

-not sure on the decoupling for your application