Honored ContributorHere we go again!
For a very simple project i used a MAX7032S. Suggested pullup an pulldown are used at jtag pins, connections kept as short as possible and large ground path as well. Only way to download POF file to my handwired prototype is to fit few picos capacitors across Clk, TMS and ground. I would not like to fit this capacitor on the final PCB!! Any suggestions ???? Thanks in advance Alf P.S. Using BYTEBLASTER II
Honored ContributorHello Half,
Normally you must only use a PullUp on TDI,TDO and TMS and a PullDown on TCK With a Usb Blaster you don't have any problem to program your EPLD. If you want to be sure You can insert a resistance (value apr. 26.1O) between Blaster and the component. In my opinion this does nothing in your case because you have only one component.Honored ContributorI think handwired may be a keyword for understanding the problems. Generally, from the JTAG signal, only TCK is edge sensitive, thus if you manage to produce a ringing TCK at the CPLD pin (e. g. by wiring inductances), the JTAG interface may see false TCK edges and fail. A small capacitor at TCK may sometimes help to get a clean TCK signal, but an appropriate wiring would be a better and more reliable way, I think. With a good PCB wiring, you shouldn't need capacitors.
Honored ContributorAgree with FvM, just have a look at the schematics of the various Altera Development kits (available in download on the Altera website) and consider that implementation of the JTAG interface. You won't have problems!
Honored ContributorThanks guys
My thinking is the same, i'll be sure just with the arrival of the final PCB I'll keep you informed about it. Thank you for the moment. AlfHonored Contributorevery thing looks fine with the final PCB
Honored ContributorI'm using Stratix II device and met some problems about jtag configuration, please help me :
when jtag operates good, the impedance 's between TCK and ground : 992K. Then, Quartus prompted that "can't access jtag". I measured TCK waveform on osciloscope and see that TCK pulse 's amplitude is reduced, and impedance became 50 ohm. Can Anybody help me ? Thanks for your attention.Honored ContributorWhat exactly do you mean when you say that at the beginning the JTAG interface seems working? Do you perform normal operations initially and then suddenly you have a failure?
What board is that? An Altera evaluation board or a custom board?Honored ContributorHi OrchestraDirector !
It's a custom board that use to control camera. It configured good at the beginning (about 50 times), then I can't access jtag. I have got 4 circuit boards. Among them, 2 boards died jtag port (config many times) and 2 board still operates good (use rarely). I checked waveform of jtag port on bad and good boards by oscilloscope. I see that, the waveform amplitude of TCK signal is reduced on bad boards, i measured impedance on TCK pin of bad boards and good boards. It followed : 1st bad board : 50 ohm. 2nd bad board : 62 ohm. 3rd good board : 992ohm. 4th good board : 992 ohm. about config circuit, I used from other circuit (it still operated good). I can't understand why it damaged jtag port ? this is my config circuit : I didn't used pull up resistor on TDO pin (follow altera guide). Thanks in advance ! http://www.cavepic.com/image-1219_4935ead3.jpg http://www.cavepic.com/thumb-1219_4935ead3.jpg (http://www.cavepic.com/share-1219_4935ead3.html)Honored ContributorHave you done some soldering rework on the two bad boards? It is a very typical situation that after a soldering rework, if the soldering paste has not correctly washed with a solvent, the JTAG port suffers from parasitic low impedance paths which destroy the signals.
Honored ContributorHi,
I have a problem of programming the device epm7128sti100 with usb-blaster, I made prototype board of device programming, I/O pins except JTAG ports are open. If I operate progmammer, it's display "unrecognized device" and the output waveform of TDO is unstable. The output is appeared first, but disappeared several operating. Please help me. Thanks.
