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15 years agoJTAG ID code specified in JEDEC STAPL Format File does not match any valid JTAG ID...
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error: jtag id code specified in jedec stapl format file does not match any valid jtag id for device. Hi everyone! I've been trying to have my FPGA programmed, but it doesn't work :( The error above occurs when I click on start button of the programmer. I am using Quartus II version 9.1 (have already tried version 10 as well - I get the same problem). Also, when I test "JTAG Chain", I get the following message: "error: unknown integrity checking failure". My device is EPM7128SLC84-15 I've been looking for a solution through Google, but couldn't find anything yet. I'd appreciate your help! I'm running out of ideas of what to do... Thanks, in advance! Regards, P. Nallin