Occasional ContributorJTAG failure
I have several PCBAs that have been returned from the customer with failed 10CX150YF780E6G FPGAs. They exhibit the symptom of the TDI being connected to TDO with a short (~5.2ns) delay, eg. much less than one TCK delay. TCK, TMS, TDI waveforms all look good, and the shape of the TDO (rise/fall times) looks good as well.
I'd like to determine the most likely cause of the failures. Some candidates are:
1) an ESD event when attaching the JTAG connector
2) power sequencing issues
3) a possible short of the +1.8V rail or TDO pin to GND.
The +1.8V rail is used for the JTAG buffers, whereas the +0.9V rail (VCCINT) is used for the JTAG TAP electronics. On this PCBA, the +1.8V and +0.9V rail come up simultaneously rather than being sequenced and we currently have neither TVS diodes nor 10 Ohm series resistors on the JTAG signals.
See attached PDF for oscillographs of a working FPGA versus a failed FPGA.
Replies from anyone reading this thread with relevant experience would be greatly appreciated!!
Hi,
Based on the shared information, the 10CX150YF780E6G FPGAs is most likely caused by ESD (electrostatic discharge) damage on the JTAG pins. This matches the symptom where TDI is directly echoed to TDO with a short delay.
To avoid this problem in future, we recommend to add ESD protection (such as TVS diodes and series resistors) on the JTAG lines, and to ensure proper ESD handling procedures when connecting the programming cable.
If you have any questions or need further assistance, please let me know.
Thank you.
Fakhrul
