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Altera_Forum
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15 years ago

JTAG Configuration on EP3C120F780 program loss

Hi All, i need help. I am having a problem with my board in which the configuration loss easily when handling the board. It is so sensitive that i had to re-program it everytime. From the hand...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

First of all thank for replying.

After program we will load the board to a rack manually. This is where the program loss. Sound weird. I am ruling out the unstable power supply because i have been monitoring the VCCQ for a while now.

Do you think the VREF will affect the configuration as i am using this pin as I/O pins

Input reference voltage for each I/O bank. If a bank uses a voltage-referenced I/O standard, then these pins are used as the voltage-referenced pins for the bank. [/I][/I]

If voltage-referenced I/O standards are not used in the bank, the VREF pins are available as user I/O pins.[/I][/I]