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Altera_Forum
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16 years ago

Jtag configuration for ARRIA GX

hi all........ We have some problem related to JTAG configuration.The problem is .... When all the bank are given 3.3 v supply the jtag working fine but when bank 4 and bank 7 are given 1.5 ...
Altera_Forum's avatar
Altera_Forum
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16 years ago

I guess, you need a level translating buffer for TDO. Altera programming adapters are sufficient slow to tolerate 10 or 20 ns of additional delay.