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Altera_Forum
Honored Contributor
Honored ContributorJrunner + Serial Flash Loader (SFL) + EPCS4 [How to programm EPCS without Quartus II]
Hello,
I'd like to adapt Jrunner to work with Serial Flash Loader. I've integrated SFL megafunction into my design and it works great. When I click auto detect in quartus II programmer it detects Cyclone II and EPCS4 which is good. How does it detect EPCS4? I'd like to modify Jrunner so I can read sillicon ID of EPCS4, erase or programm it. Reading sillicon ID is the simplest operation so I will implement it first. I've read AN39 (JTAG in Altera Devices) but there is nothing about "talking" with secondary device (EPCS) by SFL. I don't know which JTAG instruction mode I should use. I just only know that read sillicon ID operation code is "1010 1011" for EPCS devices and that the answer should be 0x12 for EPCS4. Do you have any suggestions?32 Replies
Altera_ForumoposdasdsWell, I used ALTASMI_PARALLEL to get access to my epcs16.
Now I have some strange behaviour and try to describe it. LPC - my microcontroller (lpc2138). FPGA - Cyclone II, EP2C8T144 EPCS - EPCS16 1. LPC configures FPGA (via JTAG, with Jrunner port and array of *.rbf data) 2. LPC erases EPCS (uses newly configured FPGA with ALTASMI) 3. LPC writes the same array of *.rbf data to EPCS as to FPGA. 4. LPC checks data from EPCS byte-by-byte. All seems to be ok, but after I power off the device and tur it on again, EPCS do not configures FPGA. Can anyone tell me what's the issue?- Altera_Forum--- Quote Start --- where I can find information on that SFL virtual JTAG interface? --- Quote End --- VJTAG general operation has been partially disclosed by Altera. See the respective user manual and related discussion in the forum. There's no specific document describing the low-level SFL protocol, but the MegaFunction sources are present as plain text in the Quartus library directory. You should consider, that ALTASMI_PARALLEL offers a higher level of serial flash programming than SFL.
- Altera_Forum
So, I see two ways:
1. Use SFL. This looks to be the simplest way, but i can't figure out the next step after including sfl megafunction into my design. 2. Use ALTASMI_PARALLEL. I believe, this is more flexible solution, but, also, more laborious. I shall modify my design, and also microprocessor programm. But in this case, modifications are more complex. - Altera_Forum--- Quote Start --- You just load the project image and can access EPCS by the SFL virtual JTAG interface. --- Quote End --- Ok, but where I can find information on that sfl virtual jtag interface? Thanks in advance.
- Altera_Forum
Most people are using ALTASMI_PARALLEL to program the EPCS through custom logic in the FPGA.
Generally, you don't need to load a default SFL image if you have added an SFL instance to your project. You just load the project image and can access EPCS by the SFL virtual JTAG interface. - Altera_Forum
I've got the following connections scheme:
https://www.alteraforum.com/forum/attachment.php?attachmentid=2510 I can program EPCS from PC with Altera Programmer (it uses enhanced SFL image for FPGA). I also have already ported jrunner into my LPC microcontroller. And I can configure FPGA from it. But my purpose is to configure EPCS from microcontroller. I suppose following steps for it (all done by microcontroller): 1. configure FPGA with SFL (for example the file is: SFL.rbf) 2. send my config DATA to FPGA (file: project.rbf) The questions are: Where I can get SFL image? How to send DATA? - Altera_Forum--- Quote Start --- So you have built your own SFL rather than using the existing protocol? --- Quote End --- Yes, exactly. There is no documentation (not too much) about protocol used in SFL, so I couldn't be able to write a software for my DSP to use SFL. --- Quote Start --- But if I want to write a program (sof, rpd file, I still don't know which is appropriate) into EPCS, do I really need to use Virtual JTAG? JTAG is necessary for SFL, but not for altASMI_parallel megafunction? am I right? --- Quote End --- I program RBF into EPCS4 Flash. Virtual JTAG is for communicating with your design in FPGA. If you want to program EPCS using Altera software just stay with SFL. If you need to program it without using Altera software you need to 'hack' SFL protocol or create your own design (like mine). I don't see other exists.
- Altera_Forum
Yes I have just found this friendly altASMI_parallel megafunction.
But if I want to write a program (sof, rpd file, I still don't know which is appropriate) into EPCS, do I really need to use Virtual JTAG? JTAG is necessary for SFL, but not for altASMI_parallel megafunction? am I right? Thanks, and good luck PiK for the thesis! - Altera_Forum
So you have built your own SFL rather than using the existing protocol?
- Altera_Forum
I did it. I've used Virtual JTAG Megafunction and ALTASMI_PARALLEL Megafunction.
My DSP is connected to the Cyclone II via JTAG interface. DSP is sending commands to Virtual JTAG and Cyclone II is sending commands to EPCS4 via ASMI (using ALTASMI_PARALLEL Megafunction). I am able to erase, program and read EPCS4. Full erase and program (145KB) takes about 28 seconds, so it is not bad. My Master's Thesis is going to the end. I hope so ;)
