No, I am not talking about the NIOS II at all.
by "not working", I meant the FPGA not being able to load using Remote Update IP.
Let me try saying what we are trying to do.
We are trying to store 2 different FPGA configurations in an EPCQ device (lets call them factory (0x0-0x420000) and application (0x420000-0x840000)). After applying power, the FPGA loads the initial config and can reconfigure using Remote Update IP.
When uploading the WHOLE flash image using programming tool provided in Quartus, everuthing is seamless.
Next we are trying to realize an update feature for the whole device. As of now, this consisted of rewriting the second configuration (application) in the EPCQ using the user logic (recieved via UART, sent from pc , written using ASMI parallel interface IP).
Our requirement is to use user logic and not JTAG for this as we want to supply the updates without any special hardware. I am looking for a way to generate the application binary data (data for the memory region 0x420000-0x840000) from the .sof file provided by Quartus or any other suggestion on how to achieve this feature.