Forum Discussion
Altera_Forum
Honored Contributor
10 years agoSDRAM interfaces are fast, and the interface timing is fixed for a given memory. Some interfaces allow insertion of wait states to slow things down, but SDRAM is not one of those interfaces. It's just not possible to do what you want with a standard memory controller that is not aware of the delay added by the FPGA. You would be better off doing the encryption and decryption in software.