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Altera_Forum
Honored Contributor
Honored ContributorIO-Port switching using VHDL
Hello, i have a VHDL-Project (Quartus II 9.1) wich has 96 Outputs. Every Output can be switched on/off by several entities. Every Entity wich can switch one or more Ports has a process like thi...
Altera_ForumHonored Contributor
Honored ContributorMy Concern is that if you're switching based on a simple OR of all DIO sets, what happenes if two are on at the same time? which one gets the contended port?
