Forum Discussion
Altera_Forum
Honored Contributor
17 years agoInterruption program
Hello,
I am trying to do an interruption of a video signal. I am using the hsmc quad video card of Bitec associated to a cyclone III C25 Altera card. An interruption is supposed to be generated at each frame. First of all, I don't really understand what is the context, and what I should put in the edge_capture variable. I tried to adapt the interuption program which worked on buttons but no success. It should print "coincoin" whenever an interruption occurs. I put below the parts of my program corresponding to the interruption. Tell me if you need more details. Thanks for helping, Myriam Program : volatile int pouet=0; volatile int edge_capture; static void handle_DMA_interrupts(void* context, alt_u32 id) { volatile int* edge_capture_ptr = (volatile int*) context; if (pouet==0) pouet = 1; } Then in, the main : ... IOWR(video_in_base[0], 0x0, 0x08 ); // enable bit for interrupt IOWR_ALTERA_AVALON_PIO_IRQ_MASK(VIDEO_1_BASE, 0x01); alt_irq_register( VIDEO_1_IRQ,&edge_capture, handle_DMA_interrupts ); while ( 1 == 1 ) { if (pouet == 1) {printf("coincoin"); pouet == 0; } ... }23 Replies
- Altera_Forum
Honored Contributor
Maybe the clock is not connected
- Altera_Forum
Honored Contributor
Try to compile a memory test software example. Run it from the on-chip memory and have it test the sdram. It should give you some clues about the problem you have.
- Altera_Forum
Honored Contributor
Hi,
I never work with external memory and I never had this kind of error, so I cannot be a great help here. Sorry. - Altera_Forum
Honored Contributor
Hi Jérôme,
I come back to you as I managed to target my problem... I attached to the mail my sopc design. When I put everything to onchip mem in the system library properties, everything works. Then, if I put everything to ssram or ddr-sdram except program memory (to onchip mem), nios II compiles but the program does not work. Then, if I put everything to ddr sdram, I have the traditional : Verifying 00010020 ( 0%) Verifying 04000000 ( 2%) Verify failed between address 0x4000000 and 0x400369F Leaving target processor paused I don't understand how system library properties is related to quartus II. Why doesn't it work with ssram ? I did not even add it like the ddr-sdram, it was already in the original design... Thanks, Myriam - Altera_Forum
Honored Contributor
We advance, we advance... :-)
- Altera_Forum
Honored Contributor
No, it was not but I found out why ! I did not connect the instruction data of the cpu to the ssram. Thus, I don't have memory problem anymore but my video does not work now... Still work to do ! Anyway, thank you very much for your help.
Myriam - Altera_Forum
Honored Contributor
Hi Myriam,
Normally, what appears in System Library Properties is the memory you used in SoPC. So if you add a SRAM on the SoPC, it should appear here. It is not the case ? Jérôme - Altera_Forum
Honored Contributor
Hi Jérôme,
No I don't manage to find a clear base... Anyway, I noticed that without adding a ddr-sdram, I could not change nios II : System Library Properties-> program memory from onchip memory to ssram. I have no other choice but onchip memory. Do you know what I need to do (surely in the quartus II design or anywhere) to have this possible ? Thanks, Myriam - Altera_Forum
Honored Contributor
I never use external memory so I have no idea why you have this error.
Don't you have any design furnished by altera or bitec that use an external memory, to have a clean base ? - Altera_Forum
Honored Contributor
I tried to put 70kbytes of onchip mem but I have a "can't fit in design" at the compilation. I am trying with 50kBytes (compilation is 20 minute long)
I chose DDR SDRAM for the program memory and let the rest of the right column to ssram memory. I also tried to put everything on ddr sdram memory. But now, I have : Verifying 00010020 ( 0%) Verifying 00200000 ( 0%) Verifying 02000000 (13%) Verify failed between address 0x2000000 and 0x200D7EB Leaving target processor paused So weird !