Honored ContributorHello Sir/Madam
I want to interface DDR2 with Cyclone-4 EP4CE55 FPGA device bu I am not getting how to do the pin mapping. Are there some dedicated pins to map DDR2 in Cyclone-4 FPGA? And what all points should I keep in mind while planning the pin mapping. Thank you in advance.
Honored ContributorIf in doubt, I strongly recommend you let the tools choose the pinout for you. Put your design together instantiating the DDR2 phy (ALTMEMPHY or UniPHY) and run it through Quartus. Once you have an initial pinout you can either; commit to it, or; alter it (to help with PCB layout), running your changes through Quartus each time to ensure the changes you wish to make are valid.
Further help from Altera on DDR2 is available here: external memory solutions center: ddr2 sdram (http://www.altera.co.uk/technology/memory/dram/ddr2/mem-ddr2.html) Regards, Alex
