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New Contributor

5 years ago

Intel Cyclone 10 GX w. DDR3 Memory using PLL as Clock

Hi, can i use the internal PLL of Cyclone 10 GX instead of using dedicated Clock input for DDR3 memory Clock? All Development boards are using a dedicated clock, so is this mandatory? Thanks!

Rahul_S_Intel1

Frequent Contributor

5 years ago

Hi ,

Kidnly follow the recommendation from the ug to connect to the clock to the emif Ip,

The PLL reference clock pin may be placed in the address and command I/O bank or in a data I/O bank, there is no implication on timing.

Reference page no: 20

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20116.pdf

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Intel Cyclone 10 GX w. DDR3 Memory using PLL as Clock

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