Forum Discussion
rohith1
New Contributor
4 years agoNo, let's say the FPGA is getting too hot or something like that. I want to sense that using the tsd and stop the FPGA from continuing its calculations
sstrell
Super Contributor
4 years agoA TSD IP would have an output control signal alarm or interrupt you could use to shut off other parts of the design.
Once an FPGA is programmed/configured, it's going to continue running until it loses power or the device (not the design) is reset. So you'd have to include logic in the design to perform any actions based on the TSD.