Forum Discussion
Er7Cho1gU
New Contributor
3 years agoInitial value setting errir
Hello:
I'm new in verilog. Hopping that it's not a very stupid problem.
I'm tring to buid a FSM system using register "state" to perform the state now. There is no error hint or any fun...
SyafieqS
Super Contributor
3 years agoAs we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
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