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Altera_Forum
Honored Contributor
Honored Contributorinfer true dual port asynchronous ram
hallo everyone, i need a true dual port asynchronous ram for my selfmade soft-core project. to be hardware independent i try to infer the ram-block from vhdl-code. this is my code: ...
Altera_ForumHonored Contributor
Honored ContributorI think, it's a Cyclone II problem. Quartus has special code to handle a silicon bug with internal RAM of some Cyclone II devices, resulting in doubled resource usage with true dual port RAM, If your devices aren't affected by the problem, you can disable this setting. Details can be found in the Cyclone II erata sheets.
