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Altera_Forum's avatar
Altera_Forum
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15 years ago

infer true dual port asynchronous ram

hallo everyone, i need a true dual port asynchronous ram for my selfmade soft-core project. to be hardware independent i try to infer the ram-block from vhdl-code. this is my code: ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I think, it's a Cyclone II problem. Quartus has special code to handle a silicon bug with internal RAM of some Cyclone II devices, resulting in doubled resource usage with true dual port RAM, If your devices aren't affected by the problem, you can disable this setting. Details can be found in the Cyclone II erata sheets.