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Altera_Forum
Honored Contributor
Honored Contributorinfer true dual port asynchronous ram
hallo everyone, i need a true dual port asynchronous ram for my selfmade soft-core project. to be hardware independent i try to infer the ram-block from vhdl-code. this is my code: ...
Altera_ForumHonored Contributor
Honored ContributorAsynchronous RAM is not available for Cyclone series, see the hardware handbook for details, but Stratix III and Stratix IV have it. Inference from HDL code seems not to work for those devices, though.
