Implementing Debayering on Cyclone V

Has anybody any ideas about that would it be possible to implement real-time AHD debayering (demosaicking, colour conversion) of still images (five 752x480 frames per second) with Cylone V FPGA? I know that there are IP-cores available for debayering, but usually they use just simple interpolation algorithms for the demosaicing. I would like to use more sophisticated demosaicing algorithm like AHD (Adaptive homogeneity-directed) interpolation.